1. Field of the Invention
The present invention relates to a floating gate having multiple charge storing layers, a method of fabricating the floating gate, a non-volatile memory device using the same, and a method of fabricating the non-volatile memory device, and more particularly, to a floating gate having multiple charge storing layers, a method of fabricating the floating gate, a non-volatile memory device using the same, and a method of fabricating the non-volatile memory device, in which the multiple charge storing layers which use metal nano-crystals of nano size which can easily adjust density and size, is formed to thereby enhance a charge storage capacity of the memory device.
2. Description of the Related Art
A flash memory device which is one of non-volatile memory devices can be largely classified into a floating gate type flash memory device and SONOS (Silicon-Oxide-Nitride-Oxide-Semiconductor) type flash memory device according to a charge storing structure.
The SONOS type flash memory device includes a source electrode and a drain electrode which are formed in a silicon substrate, a tunneling oxide film which is deposited on the upper surface of the silicon substrate, a nitride film which is deposited on the upper surface of the tunneling oxide film, an interception oxide film which is formed on the upper surface of the nitride film, and a gate electrode which is formed on the upper surface of the interception oxide film, in which the tunneling oxide film, the nitride film, and the interception oxide film generally have an ONO (Oxide/Nitride/Oxide) structure.
The SONOS type flash memory device can function as a memory device that stores information in which electrons are captured in charge defects formed in the inside of the nitride film formed on the upper surface of the tunneling oxide film. However, it is hard to adjust or control the number of the charge defects of the inside of the nitride film to capture electrons.
The floating gate type flash memory device generally has a vertical deposition style multi-layer gate structure having a floating gate on a silicon substrate, and the multi-layer gate structure includes at least one tunneling oxide film or dielectric film, a floating gate formed on the tunneling oxide film, and a control gate formed on the floating gate.
The floating gate type flash memory device applies a proper voltage to the control gate and the substrate, to thus make charges flow in/drain from the floating gate and to thereby record/delete data. The dielectric film maintains the charges charged in the floating gate.
By the way, if a defect or defects occur in the tunneling oxide film which have been formed below the floating gate, all charges stored in the floating gate may be lost.
Also, in the case of the flash memory cell of the deposition style gate structure, the tunneling oxide film through which charges pass has a high energy barrier in the band diagram. For this reason, a tunneling probability of charges reduces in the geometric series if thickness of the tunneling oxide film does not reduce. Therefore, the tunneling oxide film should be formed with a very precise and thin thickness. However, because it is not easy to form the tunneling oxide film very thinly without having defects, charge loss due to defects of the tunneling oxide film may occur more frequently.
Recently, to overcome problems of non-volatile memory devices that have floating gate electrodes as described above, the floating gate electrodes made of polysilicon is not used as a unit for storing charges but methods that use nano-crystals are under study.
In the case of the non-volatile memory device that uses nano-crystals as a trap film, charges are dispersed over and trapped in many nano-crystals. Thus, even though several bad crystals occur, storing of charges is not influenced seriously. Therefore, leakage current of charges reduces in comparison with the non-volatile memory devices using the floating gate electrodes, and accordingly a data retention feature can be secured sufficiently.
An example of methods of forming a modified SONOS type non-volatile memory device by forming silicon nano-crystals using a silicon-rich silicon nitride film is disclosed in U.S. Pat. No. 6,444,545.
By the way, in the case of the non-volatile memory device including nano-crystals, it is not easy to form many nano-crystals in a confined area. Accordingly, it is hard to secure a sufficient trap site. Therefore, since there is not a big difference between a threshold voltage when programmed and a threshold voltage when erased, it is not easy to identify data which is stored in a cell transistor of the non-volatile memory device. As a result, poor operations may easily occur.
Also, in the case that metal nano-crystals are used as a charge trap layer, metal is apt to be spread to a lower tunneling oxide film during a process in progress. In this case, since the tunneling oxide film is polluted by metal, a problem that a reliability drops may occur.
In order to solve the problem, the Korean Patent No. 745400 discloses a charge trap structure including a first charge trap layer made of silicon nitride and a second charge trap layer made of silicon nano-crystals or metal nano-crystals, for preventing metallic diffusion between a tunneling oxide film and a dielectric film.
However, the metal nano-crystals are formed by depositing and then heat-treating tungsten nitride, using a LPCVD (Low Pressure Chemical Vapor Deposition) process or UHCVD (Ultra High vacuum CVD) process. The silicon nano-crystals are formed using Si-rich oxide, Si-rich nitride, and Si-rich oxinitride, That is, the silicon nano-crystals are formed by the processes of forming silicon-rich oxide film, and heat-treating the same, in which excessive silicons which are not combined with oxygen in the silicon oxide film cohere.
Therefore, in the Korean Patent No. 745400, a high temperature heat treatment process is needed to form the nano-crystals on the first charge trap made of the silicon nitride.
However, when a high temperature heat treatment process proceeds to form nano-crystals in a silicon substrate, a film quality characteristic of each component (for example, a tunneling oxide film) may change according to an interface reaction and defect. Problems such as components of various film qualities and unnecessary diffusion of ions due to an ion implantation process occur, to thus deteriorate characteristics of the components.
Therefore, a technology of manufacturing a floating gate type flash memory device that can prevent problems which may be caused by a high temperature heat treatment process while taking the merits of nano-crystals, by using nano-crystals whose density and size can be easily controlled in a floating gate, is required. In addition, a method of increasing density of nano-crystals is required in order to improve an information storage capacity in one memory cell.